When I find something in the book that is wrong, I correct the text, and the project files where they are affected, and list the change here. If you have an earlier copy, this page tells you what changed and whether you need to do anything.
Last updated 26 October 2026
Volume 1
Chapter 9, Project 2: Tiny Solar Power Supply
The opening paragraph, the boost-converter footnote, the parts table's R3 row, Step 4's R3 and R4 values, the paragraph that explains Q1, and the Figure 9.19 caption
It said
The board delivers 3.3 V continuously: in daylight from the panel, and after dark by boosting the battery's stored charge. Q1 reads the panel's voltage through R3 and R4.
It now says
The board delivers 3.3 V after dark only. Q1's gate connects straight to the panel. In daylight Q1 conducts and holds the converter's shutdown pin at ground, so the converter is off and the output is the battery's voltage less D1's drop, unregulated. After dark R4 pulls Q1's gate to ground, Q1 stops conducting, and R3 pulls the shutdown pin up to the battery, which lets the converter boost the battery to 3.3 V.
Why
The old description did not match the circuit. The schematic itself was always correct; only the explanation of what it does was wrong.
What to do
Nothing to change on your board. If you power a project from it in daylight, expect the battery's voltage, about 1 V from a single NiMH cell, not 3.3 V.
Project files
No change.
Volume 2
Chapter 7, Project (Warm-up): 4×8×8 LED Matrix Array
Planning the Power Before You Draw; Building the First Cell, Step 4
It said
RSET (R1 to R4) was 10 kΩ, which the chapter said lands a little under the 40 mA per segment that the MAX7219's datasheet gives at 9.53 kΩ.
It now says
RSET is 12 kΩ. With the board's TA08-81GWA green LEDs, 12 kΩ sets a little under 40 mA per segment.
Why
The datasheet's 9.53 kΩ assumes an LED of about 3 V. Its Table 11 shows that segment current rises as the LED's forward voltage falls: for a 2.0 to 2.5 V LED, 40 mA needs 11.8 to 11.0 kΩ. The TA08's LEDs drop about 2.2 V, so at 10 kΩ each segment draws about 45 mA, above the MAX7219's 40 mA maximum. The power budget (320 mA per driver, about 1.3 A for the board) and the track widths do not change.
What to do
If you built the board with 10 kΩ, it works, but replace R1 to R4 with 12 kΩ resistors.
Project files
Every Chapter 7 project, stage and the MAX7219-Cell design block in the KLP-5e-Vol2-Projects repository now use 12 kΩ.
Chapter 3, Board Setup, and Chapter 6, Design for Manufacturing
Design Rules (Figure 3.3); the paragraph on NextPCB's minimums in Chapter 6
It said
The eight design-rule values imported from NextPCB's "Simple" file were described as the manufacturer's capability, the limits its process guarantees.
It now says
They are the minimums NextPCB recommends for a board made at no extra cost, from its "Simple" KiCad template. Each sits at or inside the limit of its process. On 1 oz copper the process itself can hold a track of about 0.08 mm, finer than the template's 0.127 mm.
Why
Some manufacturers publish both their process limits and a more comfortable recommended set. The recommended set is the one to use unless your design needs to go finer, and the chapters now say so.
What to do
Nothing to change on your board: the values themselves are the same.
Project files
No change.
Chapter 2, Creating Custom Footprints
The Exposed Thermal Pad and Its Pad Stacks: the paragraph after Figure 2.26, and the "Barrel wicking" footnote
It said
The thermal pad's vias were 0.3 mm because that is the smallest hole most low-cost fabricators will drill, and solder mask closes the bottom of each barrel so that solder cannot drain out.
It now says
The vias are 0.3 mm because of the hand-soldering method in Chapter 11, which fills the barrels with solder from the underside. Twelve 0.3 mm barrels hold 0.85 mm² of metal, against 0.38 mm² for twelve 0.2 mm ones. Solder mask covers each ring but does not seal the hole, which stays open at both ends. If you only ever reflow the board, 0.2 mm is a fair choice, and it wicks less.
Why
Tenting with solder mask does not seal a drilled hole, and NextPCB drills holes down to 0.15 mm, so a 0.2 mm via is neither a cost problem nor a reason for a rejected order.
What to do
Nothing to change if you followed the book: 0.3 mm is still the value it uses.
Project files
No change.
Chapter 8, Project (Capstone): DRV8833 Dual H-Bridge Motor Driver
Specifying the surface finish: HASL or ENIG, the first paragraph and the end of the fourth
It said
The copper finish is set in Board Setup on the "Physical Stackup" page, where it is still empty in a new project.
It now says
The copper finish is set in Board Setup, under "Board Stackup", on the "Board Finish" page, in the "Copper finish:" field. In a new project it reads "None".
Why
In KiCad 10 the copper finish has its own Board Finish page. The Physical Stackup page has no finish setting, so a reader following the old text could not find it.
What to do
Nothing to change on your board. If you have not yet set the finish, set it on the Board Finish page.
